Flip-Flop Simulator

Simulate SR, JK, D, and T flip-flops. See state transitions and excitation tables.

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Flip-Flop Simulator — Free Online Tool | LogicMinimizer

Flip-Flop Simulator

Interactive SR, JK, D, T flip-flop — clock pulse by pulse

// Type

0
Q

// Excitation Table

FAQ

What is a flip-flop?

A flip-flop is a sequential logic circuit that stores one bit of data. It changes state on clock edges, making it the basic building block of registers, counters, and memory.

What is the difference between SR, JK, D, and T flip-flops?

SR has Set/Reset inputs, JK is like SR but toggles when both are 1, D stores whatever input is present at the clock edge, and T toggles output when input is 1.

What does edge-triggered mean?

Edge-triggered means the flip-flop only reads its inputs at the moment of a clock transition (rising or falling edge), not during the entire HIGH or LOW period.

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Flip-Flop Simulator — Free Online Tool | LogicMinimizer

Flip-Flop Simulator

Interactive SR, JK, D, T flip-flop — clock pulse by pulse

// Type

0
Q

// Excitation Table

FAQ

What is a flip-flop?

A flip-flop is a sequential logic circuit that stores one bit of data. It changes state on clock edges, making it the basic building block of registers, counters, and memory.

What is the difference between SR, JK, D, and T flip-flops?

SR has Set/Reset inputs, JK is like SR but toggles when both are 1, D stores whatever input is present at the clock edge, and T toggles output when input is 1.

What does edge-triggered mean?

Edge-triggered means the flip-flop only reads its inputs at the moment of a clock transition (rising or falling edge), not during the entire HIGH or LOW period.

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